This workshop has been cancelled.

An increasing variety of applications are moving into the data center, each with their own infrastructure requirements. Some applications require support for predictable latency, others run in the background crunching huge datasets. Some are compute intensive and some require huge amounts of memory. From a datacenter operator perspective, a major challenge is to use the same resources efficiently to support such a diverse set of applications thus reducing the total cost of ownership (TCO).

Composable software-defined infrastructure (SDI) is an emerging approach to address these requirements that is being leveraged in industry initiatives such as Facebook’s Open Compute Project (OCP) Initiative, Intel’s Rack Scale Design, Ericsson’s HDS 8000 and HPE’s Synergy.

Research in this area is currently focused on creating resource pools in a data center rack and dynamically interconnecting the resources from these pools to create server systems with diverse characteristics to meet the application requirements. The development of new hardware technologies such as silicon photonics, high radix, low latency Fabrics, poolable storage class memories etc., augur well for software composable server architectures. However, many of these technologies are still in their infancy and a lot of challenges remain in both the hardware and software system architectures that need to support such dynamic composition.  Further, the main components of a datacenter infrastructure – compute, memory, storage and networking – each have their own set of unique challenges.

From an infrastructure perspective, new ways of orchestrating components to dynamically build servers and add/remove components to match the application requirements is required. These architectures change the current fault domains and create new redundancy and security models. This workshop aims to bring together researchers and practitioners to share their experiences, challenges and findings in building technologies and solutions around SDI.

Topics of interest to the workshop include, but are not limited to:

1.   Low Latency interconnects for rack-scale resource composition

2.   Programmable Server Hardware

3.   Hardware component disaggregation (e.g. memory, accelerators)

4.   Software Architectures for New/Poolable Memory Hierarchies with NVM.

5.   Fault Isolation and Redundancy Models

6.   Dynamic composition of GPU, FPGA etc.

7.   Analytics for Software Composable Infrastructures

8.   Operating System, Application and Cloud Platform optimizations for SDI/rack-scale

9.   Security and Manageability for rack scale infrastructures

10. Next generation fabrics for disaggregated memory and heterogeneous architectures (e.g Gen-Z, OpenCAPI, NVLink etc..)

Organizers:

·   Chakri Padala, Ericsson Research, Bangalore

·   Umesh Bellur, IIT Bombay, Mumbai

   Program  Committee: 

·      Ramamurthy Badrinath, Ericsson Research, Bangalore

·      Janakiram Dharanipragada, IIT Madras, Chennai

·      James Kempf, Ericsson Research, San Jose

·      Ananth Narayan S, Intel Research, Bangalore

·      Thirumale Niranjan, VMware, Bangalore

·      Mohan Parthasarathy, Hewlett Packard Enterprise, Bangalore

·      Rajeev R. Raje, Indian University- Purdue University, Indianapolis

·      João Monteiro Soares, Ericsson Research, Kista

·      Madhu Kumar S.D, NIT Calicut,India    

·      Sairam Veeraswamy, VMWare, Bangalore

·      Dongyan Xu, Purdue University, West Lafayette, Indiana 

Important Dates: 

Submission Instructions

Manuscript Guidelines

Submitted manuscripts should be structured as technical papers and must not exceed four (4) single-spaced double-column pages using 10-point size font on 8.5×11 inch pages (IEEE conference style). See style templates for details:

LaTex Package (ZIP)

Word Package (ZIP)

The submission link is here

 This workshop has been cancelled.